1. Field of the Invention
The present invention relates generally to a display driving apparatus, and more particularly, to a display driving apparatus which drives high-definition and large screen liquid crystal display panel.
2. Description of the Related Art
Recently, thin film transistor (TFT) liquid crystal (LC) display panels having TFTs as switching elements for the individual pixels became very popular. There is demand for higher definition and larger screens for LC display panels. Because of slow switching of TFTs, however, it is difficult to ensure a satisfactory operation speed for the higher definition and larger screen of the LC display panels.
To cope with the higher definition and larger screen of the LC display panels, there has been proposed an active matrix display apparatus in which the data side driver is separated into a plurality of sub sections that are operable in parallel as shown in FIG. 1. The active matrix display apparatus shown in FIG. 1 is disclosed Japanese Unexamined Patent Publication No. 61-5263. The contents of Japanese Unexamined Patent Publication No. 61-52631 are incorporated in this specification by reference.
The active matrix LC display apparatus in FIG. 1 comprises an active matrix array 2, a gate line driver 3 for driving the gate lines and three drain line drivers 4, 5 and 6 as the data side drivers which drive the drain lines. The gate line driver 3 sequentially scans the gate lines in the vertical direction in synchronism with a G-clock signal.
In synchronism with a D-clock signal, the drain line drivers 4, 5 and 6 receive one scan line of separated video signals Vv1, Vv2 and Vv3 as serial data.
The above will be discussed more specifically. The active matrix LC display apparatus 1 has a shift register 7, sample and hold circuits 8 and 9, and shift registers 10, 11 and 12 as external circuits. Video signals are sequentially written in the sample and hold circuit 8 by the shift register 7.
When scanning of the next scan line starts, the video signals written in the sample and hold circuit 8 are transferred to the sample and hold circuit 9. The video signals held in the sample and hold circuit 9 are separated into three, a third of one scan line each, by the shift registers 10, 11 and 12. The trisected video signals are written in serial in the associated drain line driver 4, 5 or 6 in synchronism with the D-clock signal.
Connected to the drain line drivers 4, 5 and 6 are the associated drain lines of the active matrix array 2. The drain line drivers 4, 5 and 6 simultaneously send the video signals to the associated drain lines.
The D-clock signal merely needs one third of the clock frequency of the one used in the case where the drain lines are driven by a single drain line driver. It is therefore possible to surely drive the active matrix LC display apparatus 1 having a large screen.
In the conventional display driving apparatus, as mentioned above, the frequency of the D-clock signal is reduced to 1/3 by simultaneously supplying data to three drain lines from the drain line drivers 4, 5 and 6. When this display driving apparatus is adapted for a television receiver, for example, it can sufficiently cope with the NTSC system. If the display driving apparatus is adapted for a display apparatus for an HDTV (High-Definition TV) or the like which uses many pixels on one scan line, however, a simple frequency reduction to 1/3 is not good enough for the required operation speed of the switching elements and cannot secure a sufficient driving time. This would deteriorate the image quality.